ICM7101D l ow c ost s ingle c hip t elephone ic rev. 2.4 icmic reserves the right to change the specifications without prior notice 1 features ? include dialer, speech, and ringer circuit in single chip, replacing two or more ics ? single board design meets multiple ptt requirements. ? operating range from 15 to 100ma ? selectable make-break ratio ? tone/pulse dialing ? 32 digit last number redial ? ring frequency discrimination ? 2-tones melody generator overview ICM7101D is a single chip telephone cmos integrated circuits that meets multiple ptt requirements, allowing phone manufacturers to have single board design for various countries. this reduces inventory and simplify manufacturing processes. ICM7101D integrates dialer, speech, and ringer circuits. the integration reduces component counts, hence increases product reliability. typical application circuit typical application circuit is as specified in appendix a. package 28-lead soic 1 agnd 2 vdd 3 vddi 4 gnd 5 txo 6 vl 7 llc 8 fopt0 9 mfl0 10 hs/dpb 11 osc1 28 stb 27 rxi 26 rxo 25 ci 24 m1 23 m2 22 r1 21 r2 20 r3 19 r4 18 c1 12 osc2 17 c2 soic 13 rgd 16 c3 14 mo 15 c4 1 agnd 1 agnd 2 vdd 2 vdd 3 vddi 3 vddi 4 gnd 4 gnd 5 txo 5 txo 6 vl 6 vl 7 llc 7 llc 8 fopt0 8 fopt0 9 mfl0 9 mfl0 10 hs/dpb 10 hs/dpb 11 osc1 11 osc1 28 stb 28 stb 27 rxi 27 rxi 26 rxo 26 rxo 25 ci 25 ci 24 m1 24 m1 23 m2 23 m2 22 r1 22 r1 21 r2 21 r2 20 r3 20 r3 19 r4 19 r4 18 c1 18 c1 12 osc2 12 osc2 17 c2 17 c2 soic 13 rgd 13 rgd 16 c3 16 c3 14 mo 14 mo 15 c4 15 c4
ICM7101D l ow c ost s ingle c hip t elephone ic rev. 2.4 icmic reserves the right to change the specifications without prior notice 2 pin description pin no symbol description 1 agnd analog ground 2 vdd supply voltage 3 vddi supply input voltage power for the chip is extracted from this pin 4 gnd ground 5 txo transmit output transmit output to be connected to external power transistor for the modulation of line voltage and for shorting the line during make period of pulse dialing. 6 vl line voltage 7 llc line loss compensation 0v = no llc; agnd=low llc; vdd=high llc. 8 fopt0 flash option fopt0=0 - 100ms fopt0=1 - 600ms 9 mfl0 dtmf level option mfl0=0 - low dtmf (~ -8/-10db for zac=600ohm) mfl0=1 - high dtmf (~ -6/-8db for zac=600ohm) 10 hs/dpb hook switch input and dial pulse output when off-hook, this pin is pulled high by the hook switch. during pulse dialing, this pin is pulled low during break periods. 11 osc1 oscillator input 3.58mhz ceramic resonator input. 12 osc2 oscillator output 13 rgd ring detection input input for ring frequency detection. 14 mo melody output melody pulse output for tone ringer. 15 16 17 18 c4 c3 c2 c1 keypad columns keypad column inputs. 19 20 21 22 r4 r3 r2 r1 keypad rows keypad rows. these pins are also used to determine the operating mode. 23 24 m2 m1 microphone inputs input for electret microphone. 25 ci complex impedance and ac impedance input placing resistor between ci and agnd pins adjusts the ac impedance. if there is no such resistor the typical ac impedance is 1000 ohm. 26 rxo receive output these outputs drive a dynamic earpiece. 27 rxi receive input input for received signal. 28 stb side tone balance input side tone cancellation input.
ICM7101D l ow c ost s ingle c hip t elephone ic rev. 2.4 icmic reserves the right to change the specifications without prior notice 3 functional description system startup ICM7101D generates inte rnal power-on-reset when vdd reaches around 1.5v. power-on- reset appropriately initiates the system to a known initial state. ICM7101D stays in shutdown mode so long as hs/dpb pin stays low. however, the ringer circuitry is activated in this mode to monitor the incoming ringing signal. oscilator all the timing of ICM7101D is based on a clock frequency of 3.58 mhz. a crystal or ceramic resonator of this frequency should be connected to oscilator pins of ICM7101D. care has to be taken in selecting this components since in practise minor deviations from the nominal frequency may occur due to the characteristics of the oscillator. it is recommended to connect a small value capcitors ( 47pf) in parallel with the oscillator to ensure start-up and or operation at the nominal frequency. tone ringer the tone ringer of ICM7101D consists of ring detection circuit and melody generator circuit. ring detection circuit ring detection circuit will assures the signal that present on rgd pin input is valid. the signal is considered as a valid signal if the signal has frequencies between 13hz and 70hz. melody generator once the valid ring signal is detected on the ring detection (rgd) pin and is present for about 75 ms continously, the melody generator will be actived, the ring signal will be monitored continously and the melody generator will be immediately turn on or off according to the momentary presence of a valid or unvalid ring signal respectively until next power on reset or off-hook. the melody generator of ICM7101D creates 2 frequencies of 874hza and 1250hz. speech network the speech network of ICM7101D consists of a transmitter and a receiver path, side tone cancellation and line loss compensation. the speech network is activated as soon as the phone goes off-hook (i.e. when hs/dpb pin goes high). at the same time the ringer circuitry is deactivated. transmit for 600 ohm termination, the transmit gain from microphone input to the line voltage is 35db. receive receive path gain is 3db for 600 ohm termination. side tone cancellation as shown in the typical application circuit in appendix a, side tone cancellation can be achieved best by balancing the whitestone bridge comprised of r11, r12, r13+r14//c6, and the line impedance. line loss compensation llc input level is scanned as the phone goes off-hook (i.e. as hd/dpb pin goes high). at the same time, the loop current level is sensed and determined. if llc=0, no compensation scheme is in effect. if llc=agnd, ?low? compensation scheme is in effect. transmit and receive gains are reduced by as much as 6db when the loop current exceeds 50ma. if llc=vdd, ?high? compensation scheme is in effect. transmit and receive gains are reduced by as much as 6db when the loop current exceeds 75ma. ac impedance placing a resistor between ci and agnd pins adjusts the ac impedance. if such resistor is not present, the typical ac impedance is 1000 ohm.
ICM7101D l ow c ost s ingle c hip t elephone ic rev. 2.4 icmic reserves the right to change the specifications without prior notice 4 dtmf level when the ac impedance is set to 600ohm, dtmf level is determined by mfl0 pin as follow: mfl0 dtmf level 0 -8/-10 db 1 -6/-8 db dialing functions keypad arrangement is as shown in the typical application circuit in figure 1. dialing modes are selectable using the pull-up/pull-down resistors connected to the row inputs. as soon as the phone goes off-hook (i.e when hs/dpb pin goes high), voltage levels on keypad row inputs (r1 thru r4) are first scanned to determine the operating mode as follow: pin function level ? mode r1 dialing mode 0 ? mf mode 1 ? ld mode r2 ld period 0 ? 10 pps 1 ? 20 pps r3 make/break ratio 0 ? 33/67 1 ? 40/60 r4 dtmf option 0 ? 82ms/82ms 1 ? 82ms/160ms valid keys ICM7101D has a total of 15 valid keys. it scans the keys by asserting known state on pins r1, r2, r3, and r4 in sequence, and check which column (pins c1, c2, c3, c4) is shorted to which row. the following specify the combinations: c1 c2 c3 c4 r1 1 2 3 pause r2 4 5 6 mute r3 7 8 9 flash r4 * 0 # lnr dtmf tones the dtmf tone generator creates 12 tones in compliance with ccitt recommendation. there are two group of frequencies of dtmf tones. the low group depends on the key?s row, while the high group depends on the key?s column as illustrated in the following table: c1 c2 c3 low freq r1 1 2 3 697 hz r2 4 5 6 770 hz r3 7 8 9 852 hz r4 * 0 # 941 hz high freq 1209 hz 1336 hz 1477 hz last number redial (lnr) the last number redial (lnr) is a facility of ICM7101D to allow resignalling of the last manually dialled number without keying in all digits again. the lnr is repeatable after each off-hook. a manually entered number is stored in a ram of ICM7101D. the capacity of ram is 32 digits. flash ICM7101D assert line break (pull down hs/dpb pin) when flash key is depressed. the flash duration depends on the fopt0 as follow: fopt0 flash duration 0 100 ms 1 600 ms mute ICM7101D turns off the microphone input from m1 and m2 pins when mute key is depressed. depressing the key again toggle the mute function. pause ICM7101D pauses (no dialing and microphone is muted) for 2.2 seconds when pause key is depressed.
ICM7101D l ow c ost s ingle c hip t elephone ic rev. 2.4 icmic reserves the right to change the specifications without prior notice 5 absolute maximum rating symbol parameter value unit vddi supply line voltage -0.3 to 7.0 v v in digital input voltage -0.3 to 7.0 v t stg storage temperature -55 to +150 o c t sol soldering temperature 300 o c note 1: stress greater than those listed under absolute m aximum ratings may cause permanent damage to the device. this is a stress rating only and functional oper ation of the device at these or any other conditions above those indicated in t he operational sections of this specification is not implied. exposure to absolute maximu m rating conditions for extended periods may affect reliability. operating range range ambient temperature commercial -25 o c to 70 o c electrical characteristics (i line = 15ma unless otherwise specified) symbol parameter test conditions min typ max unit v ddi regulated line voltage i line : 13ma to 100ma 4.5 v i dd operating current speech mode tone dialing pulse dialing v dd = 2.5v ring mode v dd = 2.5v 3 4 0.2 0.3 ma ma ma ma i ol output current, sink txd, hs/dpb, mo v ol = 0.4v 1.5 ma vil input voltage low hs/dpb, rgd t a =25 o c vss 0.3 vdd vih input voltage high hs/dpb, rgd t a =25 o c 0.7 1 vdd transmit (tx) g t x transmit gain 34 35 36 db thd distortion v il < 0.5 v rms 2 % z in input impedance 20 k ? g mute mute attenuation mute activated 60 db v in m1,m2 input voltage range differential single ended +/- 1 +/- 0.5 v pp v pp receive (rx) g rx receive gain 2 3 6 db thd distortion v rxi < 0.5 v rms 2 % z in input impedance (ri) 8 k ? v in rxi input voltage range +/- 2 v peak output driver (bjt) v in max input voltage range +/- 2 v peak v tx dynamic range +/- 2 v peak rl return loss z rl = 1000 ? 18 db side tone (st) g st side tone cancellation 26 db v in st input voltage range +/- 2 v peak keyboard t d key debounce time 64 ms
ICM7101D l ow c ost s ingle c hip t elephone ic rev. 2.4 icmic reserves the right to change the specifications without prior notice 6 hs/dpb input t hs-l low to high debounce going off-hook 15 ms t hs-h high to low debounce going on-hook 15 ms tone ringer v mo melody output pdm t md melody delay 10 ms f1 frequency 1 874 hz f2 frequency 2 1250 hz t dt detection time ring freq = 20hz 50 80 ms f min min. detection frequency 13 hz f max max. detection frequency 70 hz dtmf f frequency deviation note 5 -0.31 +0.75 % t td tone duration note 1 80 82 84 ms t itp inter tone pause note 1 80 82 84 ms note 1: the values are valid during automat ic dialing and are minimum va lues during manual dialing, i.e. the tones will continu e as long as the key is depressed. note 3: relative to high group note 5: this does not include the frequency deviation of the ceramic resonator.
ICM7101D l ow c ost s ingle c hip t elephone ic rev. 2.4 icmic reserves the right to change the specifications without prior notice 7 appendix a: typical application circuit
ICM7101D l ow c ost s ingle c hip t elephone ic rev. 2.4 icmic reserves the right to change the specifications without prior notice 8 package information 28-lead soic (unit: inches)
ICM7101D l ow c ost s ingle c hip t elephone ic rev. 2.4 icmic reserves the right to change the specifications without prior notice 9 disclaimer the information contained herein is current as of th e date of publication; however, delivery of this document shall not under any circumstances create any implication that t he information contained
ICM7101D l ow c ost s ingle c hip t elephone ic rev. 2.4 icmic reserves the right to change the specifications without prior notice 10 herein is correct as of any time subsequent to such date. icmic reserves the right to make changes without notification, even if such changes would render information contained herein inaccurate or incomplete. icmic makes no representation or warrant y that any circuit designed by reference to the information contained herein, will function wi thout errors and as intended by the designer.
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